> > I believe that is the way the i960 is emulated in virtua & nebulam2. You could
> > do it dynamically too, although it might not be worth it unless the decode was
> > particularly heavy.
> > smf
> it seems a bit different from what I use in nebulam2, it seems that it generates
> a func for each instruction variation (register and flags), while for m2 I only
> generate 1 variation, and use a struct to hold the pointers to the src and dst
> operands, that requires extra work on decoding, I don't know if it's faster or
> I should work some day on making the DSP alu ops not to compute the flags
> always, actually the code to compute flags is twice as big as the code to just
> compute the result (that will be a very nice speedup).
I've found that often too - things like half-carry on z80 for example can take so long to calculate when you don't have an opcode like lahf
Even in assembler though it can be a nasty overhead. Dead flag elimation could go quite far...!
Especially if you replaced the opcode directly with the handler
I'm wondering if (because C makes quite a good job on the register copies but a bad job on the flag calculation) dead flag analysis could bring C emulators very close to Asm ones and possibly even past them!
(Of course the ideal would be a Asm emulator with dead flag analysis as well, but who can be bothered!)
You learn something old everyday...