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SubjectRe: Ahhh! That's genius! Reply to this message
Posted byRiff
Posted on12/15/03 02:27 PM



> Both. If it's in RAM, you have to keep track of whether it's been overwritten,
> which can introduce significant overhead.

I think my approach to the problem would be to partition memory space into equal sized regions and keep a bitmap. For every memory write I would set the bit associated with the region containing the memory address. Then in the dispatch loop, the code would clear the cache if the region to be executed has been written and the bitmap would also be cleared. Writes to the current execution region would also require code to do an early exit back to the dispatch loop.

For Nuance, I didn't really have to worry about this. None of the games use self-modifying code. The main processor is cached so the cache only needs to be flushed when the appropriate BIOS call is made. The three other processors are not cached but local memory is split into IRAM and DTRAM and the only way to access external memory is through DMA. The only check I make is to clear the cache for DMA reads from external memory to local IRAM. I assume that any code in the DTRAM area will be loaded by the main MPE via BIOS. This handles all existing situations so far. The instruction encodings are convoluted enough that self-modifying code would probably be more expensive than non-modifying code in both terms of speed and space so I'm not really concerned about supporting it.

> > This is how the Nuon Aries3 processor works.
>
> Speaking of which, is there a programmer's manual for this processor? I'd love
> to add it to my little collection of CPU/DSP documentation :)
>

The public version of the official documentation set is in the SDK which you can get from [url]http://www.nuon-dome.com[/url] in the downloads section. Its very detailed but there are some errors, mostly typos except in the case of the BCLR description where the real-world flag behavior is different from what is shown in the architecture document. It also omits a lot of *cough*nuances*cough*, particularly involving pixel DMA for Z-buffered formats. Most importantly, the architecture document does not contain explain the decoding scheme and completely omits instruction encodings. For these, you have to go to my instruction encoding document which is on [url]http://emuforge.org[/url] in the files section of the forums.

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Entire Thread
Subject  Posted byPosted On
*Does Generator have a 68000 Dynarec?  finaldave12/10/03 03:35 PM
.*Re: Does Generator have a 68000 Dynarec?  Bart T.12/10/03 03:48 PM
..*Ahhh! That's genius!  finaldave12/11/03 05:03 AM
...*Re: Ahhh! That's genius!  smf12/12/03 07:56 AM
....*Re: Ahhh! That's genius!  ElSemi12/13/03 07:31 AM
.....*Re: Ahhh! That's genius!  finaldave12/13/03 05:19 PM
......*Re: Ahhh! That's genius!  Bart T.12/13/03 08:31 PM
.......*Re: Ahhh! That's genius!  ElSemi12/14/03 05:18 AM
........*Re: Ahhh! That's genius!  Riff12/15/03 00:38 AM
.........*Re: Ahhh! That's genius!  Bart T.12/15/03 01:17 AM
...........Re: Ahhh! That's genius!  Riff12/15/03 02:27 PM
...........*Re: Ahhh! That's genius!  Bart T.12/16/03 03:20 AM
...........*Re: Ahhh! That's genius!  finaldave12/15/03 03:48 PM
............*Re: Ahhh! That's genius!  Bart T.12/15/03 04:30 PM
.............*Re: Ahhh! That's genius!  Kayamon12/18/03 08:56 AM
..............*Re: Ahhh! That's genius!  finaldave12/18/03 09:36 AM
...............*Re: Ahhh! That's genius!  smf12/19/03 04:33 AM
.............*Re: Ahhh! That's genius!  finaldave12/16/03 05:16 AM
..............*Re: Ahhh! That's genius!  Bart T.12/16/03 01:04 PM
...............*Re: Ahhh! That's genius!  finaldave12/16/03 03:40 PM
................*Re: Ahhh! That's genius!  smf12/17/03 06:33 AM
.................*Re: Ahhh! That's genius!  finaldave12/17/03 06:39 AM
..................*Re: Ahhh! That's genius!  smf12/17/03 09:57 AM
...................*Re: Ahhh! That's genius!  finaldave12/17/03 12:39 PM
....................*Re: Ahhh! That's genius!  smf12/17/03 02:59 PM