I was just having a quick look at the source code to FPSE and was shocked that the cpu emulator looks like it's actually very very compact (cpu2.cpp in the source, 500 lines) and just seems to have stuff like

case ADDU: rd = rs rt; break;
case SUBU: rd = rs - rt; break;
case BNE: if (rt!=rs) { JUMP(PC immS*4); } break;

Is this because MIPS is a very reduced instruction set (i.e. the decode is similar in each opcode)?

Is emulating a MIPS 3000A in interpreted mode as simple as this source seems to suggest? (well... simple compared to say 68000 or 65816 at least!)
Or am I missing something in the source?


You learn something old everyday...