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SubjectPlaystation Emu Reply to this message
Posted byfinaldave
Posted on12/16/03 09:16 AM

I was just having a quick look at the source code to FPSE and was shocked that the cpu emulator looks like it's actually very very compact (cpu2.cpp in the source, 500 lines) and just seems to have stuff like

case ADDU: rd = rs rt; break;
case SUBU: rd = rs - rt; break;
case BNE: if (rt!=rs) { JUMP(PC immS*4); } break;

Is this because MIPS is a very reduced instruction set (i.e. the decode is similar in each opcode)?

Is emulating a MIPS 3000A in interpreted mode as simple as this source seems to suggest? (well... simple compared to say 68000 or 65816 at least!)
Or am I missing something in the source?

You learn something old everyday...

Entire Thread
Subject  Posted byPosted On
.Playstation Emu  finaldave12/16/03 09:16 AM
.*this way last opcode costs more than the first  Terry Bogard12/17/03 07:40 PM
..*Re: this way last opcode costs more than the first  Bart T.12/17/03 09:46 PM
.*Re: Playstation Emu  galibert12/16/03 09:37 PM
..*Re: Playstation Emu  finaldave12/18/03 04:59 AM
...*Re: Playstation Emu  tratax12/30/03 07:11 PM
..*Re: Playstation Emu  finaldave12/17/03 05:05 AM
...*Re: Playstation Emu  smf12/17/03 06:21 AM
....*Re: Playstation Emu  finaldave12/17/03 06:21 PM
.....*Re: Playstation Emu  Riff12/17/03 07:57 PM
......*Re: Playstation Emu  smf12/18/03 05:24 AM
.......*Re: Playstation Emu  tratax12/30/03 07:07 PM
........*Re: Playstation Emu  smf01/02/04 05:56 AM
........*Re: Playstation Emu  R. Belmont12/31/03 01:19 AM
.........*Re: Playstation Emu  tratax01/01/04 06:06 PM
.......*Re: Playstation Emu  ElSemi12/18/03 01:24 PM
........*Re: Playstation Emu  Riff12/18/03 04:56 PM
.*Re: Playstation Emu  Bart T.12/16/03 01:02 PM