Yes, i'm sure the core could use some optimization! :)
Tell me more about what you mean about having to wait for ram access in relation to what I might be doing wrong... ie, are you saying my instructions need to eat more cycles? To be honest, I'm a bit confused in general about the timing on the Arm7 especially with all the pipelining stuff, so I wasn't quite sure how to code the instruction cycles.
If I run the cpu slower, but keep the IRQ the same, the output is distorted, probably since (i'm guessing) the cpu cannot fill the output buffer fast enough.
> you might be runnning too many instructions anyway, cpu's with data/instruction
> caches can't always run full speed as they have to wait for ram accesses.
> clocking the cpu down but running the timer at the right speed might be enough.
> It sounds like your cpu core could do with being optimised a bit though.